CONFERENCE SCHEDULE

	11	12		13		14
		A	B	A	B	Technical Tour
9:00		9:30 Registration
10:00				P3: Kazuya Masu
		Opening
		P1: Micael Pecht		P4: Sung Yi
11:00
		P2: Mario Bolanos-Avila
				Thick & Thin Film Materials	Modelling & Simulation (1)
12:00		Lunch
				Lunch
13:00		Quality & Reliability (1)	Interconnection Technologies
				Packaging (1)
					Modelling & Simulation (2)
14:00
		Break
		Quality & Reliability (2)	Optoelectronics / Photonics
15:00				Break
				Packaging (2)	Thermal Management
16:00	Registration	Break
		Quality & Reliability (3)	Polymer Materials
17:00
18:00		Reception		Banquet

PRESENTATION FORMAT

Oral Presentation All papers will be presented in English. Each speaker is allotted 20 minutes for presentation and discussion of a paper. Keynote speakers are allotted 40 minutes including discussion. Presenters are requested to contact the session chairmen before the start of their session.
Audio/Visual Equipment
Each session room will be equipped with a projection screen, an overhead projector and an LCD projector.
Also a Windows computer will be preset in each session room. Presenters are to copy their presentation files to the computer during the break. Student staff will assist you.



KEYNOTE LECTURES

Monday, December 12
10:40-11:20
The Story Behind the Red Phosphorus Mold Compound Device Failures
Prof. Michael Pecht, University of Maryland, USA

11:20-12:00
Semiconductor Integrated Circuit Packaging Technology Challenges - Next Five Years
Dr. Mario A. Bolanos, Texas Instruments Inc., USA

Tuesday, December 13
10:00-10:40
Gbps Signal Transmission on Si CMOS ULSI
Prof. Kazuya Masu, Tokyo Institute of Technology

10:40-11:20
A Study of Hygro-Thermal Deformations and Stresses in FCPBGA
Prof. Sung Yi, Portland State University, USA


GENERAL SESSIONS

Monday, December 12
13:00-14:20
Quality & Reliability (1)
Chairs: Noriyuki Miyazaki, Kun-Fu Tseng
Development of an Automated X-Ray Inspection Method for Microsolder Bumps
Atsushi Teramoto (Nagoya Electric Works Co., Ltd. ), Takayuki Murakoshi, Masatoshi Tsuzaka (Nagoya University) and Hiroshi Fujita (Gifu University)

Reliability Assessment of BGA Solder Joints under Cyclic Bending Loads
Ilho Kim (KAIST, Korea) and Soon-Bok Lee

Case Studies of Reliability Analysis by Stochastic Methodology in BGA Creep Analysis
Shoji Sasaki (MSC.Software Ltd.), Motoharu Tateishi, Isamu Ishikawa and Paul Vanderwalt (MSC.Software Corporation, USA)

Fatigue Crack Propagation Analysis for Micro Solder Joints with Void
Takeshi Terasaki (Hitachi, Ltd) and Hisashi Tanie

13:00-14:20
Interconnection Technologies
Chairs: S.W. Ricky Lee, Kenji Gomi
Studies on Double-Layered Metal Bumps for Fine Pitch Flip Chip Applications
Ho-Young Son (KAIST, Korea), Yong-Woon Yeo (Nepes Corperation, Korea), Gi-Jo Jung, Jun-Kyu Lee, Joon-Young Choi, Chang-Joon Park (Hynix Semiconductor, Korea), Min-Suk Suh, Soon-Jin Cho (Samsung Electro-Mechanics, Korea) and Kyung-Wook Paik (KAIST, Korea)

Dynamic Characterization Study of Flip Chip Ball Grid Array (FCBGA) on Peripheral Component Interconnect (PCI) Board Application
Wong Shaw Fong (Intel Technology, Malaysia), Loh Wei Keat, Lee Yung Hsiang,
Yap Eng Hooi (Intel Product, Malaysia), Wong Siang Woen, Hin Tze Yang (Intel Technology, Malaysia) and Martin Tay Tiong We

Stability of Ni3P and Its Effect on the Interfacial Reaction between Electroless Ni-P and Molten Tin
K. Chen (Loughborough University, UK), C. Liu, D.C. Whalley and D.A. Hutt

Investigation of void-free Electroplating Method on Copper Column based Solder Bump for Flip-Chip Interconnections
Hiroshi Yamada (Toshiba Corporation)

14:40-16:00
Quality & Reliability (2)
Chairs: Takeshi Terasaki, Masyood Akhtar
Reliability Analysis of Embedded Chip Technique with Design of Experiment Methods
Xiuzhen Lu (Shanghai University, China), Liu Chen (Chalmers University of Technology, Sweden), Zhaonian Cheng and Johan Liu (Shanghai University, China / Chalmers University of Technology, Sweden)

A Role of Ti-Sn Diffusion Layer Formed at the Interface between Pb Free Solder and TiNiAu Multi-Layer
Kimiharu Kayukawa (Denso Corporation) and Akira Tanahashi

In Situ Observation of Interfacial Fracture in Low-dimensional Nano Structures
Yoshimasa Takahashi (Kyoto University), Hiroyuki Hirakata and Takayuki Kitamura

Effect of Frequency on Fatigue Crack Growth along Interface between Copper Film and Silicon Substrate
Do Van Truong (Kyoto University), Hiroyuki Hirakata and Takayuki Kitamura

Evaluation of Thermal Deformation Behavior in Electronic Package using UV Moire Interferometry
Jin-Hyoung Park (KAIST, Korea) and Soon-Bok Lee

14:40-16:00
Optoelectronics/Photonics
Chairs: Hiroshi Yamada, Kazuyoshi Fushinobu
Characterization of Au-Sn Eutectic Die Attach Process for Optoelectronics Device
Thang Tak-Seng (Lumileds Lighting (M) Sdn Bhd, Malaysia), Decai Sun, Huck-Khim Koay, Mohd-Fezley Sabudin, Jim Thompson, Paul Martin, Pradeep Rajkomar and Shatil Haque

Propagation Loss Evaluation of Optical Transmission/Interconnect System with Grating Structure
Akiya Kimura (Osaka University), Kiyokazu Yasuda, Michiya Matsushima and Kozo Fujimoto

A New Method of Birefringence Measurement to Obtain Stress Field Using Photoelasticity
Kenji Gomi (Tokyo Denki University), Kengo Shimizu, Hayato Suzuki, Shinichi Gohira, Yasushi Niitsu and Kensuke Ichinose

Optimization of Epoxy Flow for Passive Alignment of Optical Fiber Arrays
Jeffery C. C. Lo (Hong Kong University of Science & Technology, Hong Kong), Chung Yeung Li, Chung Leung Tai and S. W. Ricky Lee

16:20-18:00
Quality & Reliability (3)
Chairs: Hirotsugu Inoue, Soon-Bok Lee
Effect of Lead and Cadmium Free Glasses on Reliability of the Silver End Termination for MLCC Application
Masyood Akhtar (LORD Corporation, USA)

The Study of Silicon Die Stress in Stacked Die Packages
Eiichi Yamada (Texas Instruments Japan Limited), Kenji Abe, Yutaka Suzuki and Masazumi Amagai

A Multifunctional Test Chip for Microelectronic Packaging and Its Application on RF Property Measurements
Kun-Fu Tseng (Chin-Min Institute of Technology, Taiwan), Yi-Hsun Hsion, Ben-Je Lwo and Chin-Hsing Kao (National Defense University, Taiwan)

Strain Measurement in the Microstructure of Advanced Electronic Packages Using Digital Image Correlation
Nobuyuki Shishido (Kyoto University), Toru Ikeda and Noriyuki Miyazaki

Effect of Au and Ni Layer Thicknesses on the Reliability of BGA Solder Joints
M.O. Alam (City University of Hong Kong, Hong Kong), Y.C. Chan and L. Rufer (TIMA Lab.,France)

16:20-18:00
Polymer Materials
Chairs: Noriyuki Miyazaki, Han-Ki Yoon
Study on Long Life Large-Deflective Hinges in Molded Pantograph Mechanisms based on Cyclic Load-Bending Fatigue Test
Mikio Horie (Tokyo Institute of Technology), Yudai Okabe, Masahiro Yamamoto and Daiki Kamiya

Warpages of ACF-bonded COG Packages Induced from Manufacturing and Thermal Cycling
M.Y. Tsai (Chang Gung University, Taiwan), C.Y. Huang, C.Y. Chiang, W.C. Chen (ERSO/ITRI, Taiwan) and S. S. Yang

Simulation of Tensile Deformation Behavior of Polymer by Chain Network Model
Akira Shinozaki (Tokyo Institute of Technology), Kikuo Kishimoto and Hirotsugu Inoue

Effects of the Functional Groups of Non-Conductive Films (NCFs) on Materials Properties and Reliability of NCF Flip-Chip-On-Organic Boards
Chang-Kyu Chung (KAIST, Korea), Woon-Seong Kwon, Jin-Hyoung Park, Soon-Bok Lee and Kyung-Wook Paik

Effects of Low-modulus Die Attach Adhesive on Warpage and Damage of BGA
Sung Yi (Portland State University, USA), Paresh D. Daharwal (Intel Corporation, USA), Yeong J. Lee (Motorola, USA) and Brian R. Harkness (Dow Corning, USA)

Tuesday, December 13
11:30-12:30
Thick & Thin Film Materials
Chairs: Hideo Miura, Chyanbin Hwu
Hardness and Elastic Modulus of ZnO Deposited materials by PLD Method
Han-Ki Yoon (Dong-Eui University, Korea) and Yun-Sik Yu

Mechanical properties of ITO/PET Thin Film Deposited by DC MG Method
Do-Hyoung Kim (Dong-Eui University, Korea), Han-Ki Yoon, Do-Hoon Shin (University of Tokushima) and Riichi Murakami

Formation and Characterization of Sputtered Thin Film for Optimizing Multilayered Interconnection Structure
Wataru Sashida (Kogakuin University) and Yuji Kimura


11:30-12:30
Modelling & Simulation (1)
Chairs: Wataru Nakayama, Satbir Madra
A Study of Hot Spot in Silicon Device for Stacked Die Packages
Jotaro Akiyama (Texas Instruments Japan Limited), Masanobu Naeshiro and Masazumi Amagai

Modelling the Lamination Process for Ruggedised Displays
Yek Bing Lee (University of Greenwich, UK), Chris Bailey, Hua Lu, Steve Riches, Martin Bartholomew and Nigel Tebbit

Modelling and Simulation of a Fluid-driven Microturbine
Chanwut Sriphung (Heriot-Watt University, UK) and Resh Dhariwal

13:20-15:00
Packaging (1)
Chairs: Chris Bailey, Takashi Kawakami
Development of The Embedded LSI Technology in PALAP^TM
H. Kamiya (DENSO Corporation), T. Miyake, H. Kobayashi and K. Kondo

Wafer-scale BCB Resist-Processing Technologies for High Density Integration and Electronic Packaging
Rainer Pelzer (EV Group, Austria), Viorel Dragoi, Bart Swinnen (IMEC, Belgium), Philippe Soussan and Thorsten Matthias (EV Group, Austria)

Microscale Magnetic Components for the Application of DC-DC Converters Operating in the 1-10 MHz Range
David Flynn (Heriot-Watt University, UK), Anthony Toon and Marc Desmulliez

Low-Cost Active-Alignment of Single-Mode Fiber-Arrays
D. Weiland (Heriot Watt University, UK), M. Luetzelschwab, M.P.Y. Desmulliez, A.Missoffe and C. Beck (TWI Ltd., UK)

SAW Chemical Sensors based on AlGaN/GaN Piezoelectric Material System: Acoustic Design and Packaging Considerations
L. Rufer (TIMA Lab.,France), A. Torres, S. Mir, M.O. Alam (City University of Hong Kong, Hong Kong), T. Lalinsky (Slovak Academy of Sciences, Slovak Republic) and Y. C. Chan (City University of Hong Kong, Hong Kong)

13:40-15:00
Modelling & Simulation (2)
Chairs: Kyung-Wook Paik, Resh Dhariwal
Stress Intensity Factors of Interface Corners
Chyanbin Hwu (National Cheng Kung University, Taiwan) and T.L. Kuo

The Impact of Capacitors Selection and Placement to the ESL and ESR
Huang Jimmy Huat Since (Intel Microelectronic, Malaysia), Sijher Taninder S and Beh Jiun Kai

Evaluation of Drop Impact Load for Portable Electronic Components
Takahiro Omori (Toshiba Corporation), Hirotsugu Inoue (Tokyo Institute of Technology), Noriyasu Kawamura (Toshiba Corporation), Minoru Mukai, Kikuo Kishimoto (Tokyo Institute of Technology) and Takashi Kawakami (Toshiba Corporation)

Nonlinear Dynamic Behavior of Thin PCB Board for Solder Joint Reliability Study under Shock Loading
Loh Wei Keat (Intel Technology, Malaysia), Lee Yung Hsiang, Ajay A/l Murugayah, Tay and Tiong We

15:20-17:00
Packaging (2)
Chairs: Dominik Weiland, Takashi Kawakami
Evaluation of Fatigue Strength for Solder Joints after Thermal Aging
Takeshi Miyazaki (Tokyo Institute of Technology), Masaki Omiya, Hirotsugu Inoue, Kikuo Kishimoto and Masazumi Amagai (Texas Instruments)

Local Thermal Deformation and Residual Stress of a Thin Si Chip Mounted on a Substrate Using An Area-Arrayed Flip Chip Structure
Hideo Miura (Tohoku University), Nobuki Ueta and Yuhki Sato

The Novel Flip Chip Ball Grid Array Design and Challenges to Enable Higher Routing Density and Power Requirement
Chee Wai Wong (Intel Technology, Malaysia), Chee Kheong Yoon and Seng Hooi Ong

Fatigue Crack Growth in Lead-free Solder Joints
Masaki Omiya (Tokyo Institute of Technology), Kikuo Kishimoto and Masazumi Amagai (Texas Instrument)

15:20-17:00
Thermal Management
Chairs: Masazumi Amagai, Ming-Yi Tsai
Turbulence Modelling for Electronic Cooling: A Review
K. Dhinsa (University of Greenwich, UK), C. Bailey and K. Pericleous

Heat Conduction in Composites of Thermally Dissimilar Materials - A Methodology to Economize Numerical Heat Transfer Analysis of Electronic Components
Wataru Nakayama (ThermTech International)

Critical Appraisal of Thermo-Mechanical Reliability of Medium-Power Heterojunction Bipolar Transistors for Base Station and Military Applications Mounted in SOIC-8 Leadframe Based Plastic Overmold Packages with Conductive Silver Epoxy
Satbir Madra (WJ Communications, Inc., USA)

A Study in Establishing Flip-Chip Ball Grid Array (FCBGA) Second Level Interconnect (SLI) Reliability Requirement by CFD Simulation
Lee Eng Kwong (Intel Technology, Malaysia) and Tan Wooi Aun

Electro-Thermal Analysis of Device Interactions in Si CMOS Structure
Tomoyuki Hatakeyama (Tokyo Institute of Technology), Kazuyoshi Fushinobu and Ken Okazaki

Submission of Abstract: June 30, 2005
Notification of Acceptance: July 31, 2005
Submission of Manuscript: September 30, 2005